PRELIMINARY - NOT APPROVED FOR PROCUREMENT, FABRICATION, ASSEMBLY, CONNECTION, MOTION OR ENERGIZATION
Two routed physical carrier candidates.
The whole-body architecture now has complete application circuits, exact footprints, 82 × 42 mm routed board geometry, editable KiCad sources and layer-by-layer inspection views.
Verified here: native KiCad ERC 0/0, DRC 0/0, zero unconnected pads, exact all-copper isolation moats and a bound JLC06161H-3313 candidate stackup. Not verified: independent layout acceptance, manufacturer DFM, controlled impedance, signal integrity, EMC, thermal, fault behavior or physical safety. Machine files are inspection/quotation candidates only and are not released for ordering.
Field connectors now match the planning conductors
The five RS-485 ports use JST PA B03B-PASK-1 headers with PAP-03V-S housings and SPHD-001T-P0.5 contacts; the published 0.13–0.33 mm² contact range includes the 0.25 mm² planning conductor. The three TTL ports use B02B-PASK-1, PAP-02V-S and SPHD-002T-P0.5; its 0.08–0.21 mm² range includes the 0.14 mm² planning conductor. Both are data-only boundaries with no actuator VDD contact. Received-part fit, insulation diameter, crimp tooling, pull strength and physical electrical validation remain open.